Modbus Remote IO Module 16 Digital Output Relay output type high precision data acquisition module M420

Modbus Remote IO Module 16 Digital Output Relay output type high precision data acquisition module M420
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SRF_AD9361_V2.0 software radio radio frequency module is the core of AD9361 chip. We design the SRF_AD9361_V2.0 strictly according to the material and impedance of the radio frequency circuit. It ensures that the performance of AD9361 has no damage, thus reducing the difficulty of the ordinary users to use AD9361. We also developed a complete supporting master and application demonstration based on Altera FPGA+STM32.
The AD9361 chip is a high-performance, high integrated bi-directional transceiver from baseband to radio frequency (RF). The programmable and broadband capability of the chip makes it an ideal choice for many transceivers. The device sets the RF front end and the flexible baseband part of the mixed signal, integrating the frequency synthesizer, providing a configurable digital interface for the processor, thus simplifying the design import. The working frequency range of AD9361 is from 70 MHz to 6 GHz, and the channel bandwidth of dual input and dual output is less than 200 kHz to 56 MHz.
The size of RF module of SRF_AD9361_V2.0 software radio is only 35mm * 50mm, which is powered by single 5V.
The block diagram of SRF_AD9361_V2.0 module and its typical external connection.
On the digital side, the input and output of SRF_AD9361_V2.0 is directly connected to the user digital circuit, generally FPGA and ARM, and the logic level is 1.8V. Besides the clock, it includes SPI interface and 12 bit user baseband interface.
On the RF side, the SRF_AD9361_V2.0\'s input and output interface includes two RF input interfaces RX1 and RX2, two RF output interfaces directly connected to AD9361, TX1 and TX2 (TX1 and TX2\'s signal range of 0MHZ-6GHZ), and TX1 and TX2 typically maximum output as 0dBm, to be connected to the power amplifier that the user may have.
In order to reduce the user\'s workload, we have also integrated a 19dBm power amplifier on SRF_AD9361_V2.0 to facilitate the use of most users directly under laboratory conditions. ATX1 and ATX2 are the output of power amplification. The operating range of the power amplifier is 0-4GHz.
Among them, J6 and J7 are the interface between the power and digital circuits of the module, consisting of two 18*2 pins, and the spacing between the pins is 2mm, which leads to all the digital interfaces of AD9361. The power supply is 5V DC.
The input and output of the module RF signal is connected to the external interface through the IPEX interface, and the following table is the illustration of each IPEX interface.
SRF_AD9361_V2.0 motherboard matching principle
The motherboard includes SRF_AD9361_V2.0 matching:
(1) 4 debug LED;
(2) an ordinary 50MHZ crystal oscillator;
(3) a GPS constrained time subsystem (14bit DAC+VTCXO).
(4) SRF_AD9361_V2.0 module;
(5) time service Ublox GPS module;
(6) Altera EP4CE55 FPGA, customizable;
(7) STM32F407 ARM, the maximum frequency 168MHZ, with floating point operation unit.
(8) USB 2 serial port module supports dual serial ports, and the maximum rate of each serial port is 9216000Baud/s.
(9) WiFi can be configured as routers or ordinary user network cards.
(11) 4KB EEPROM storage user configuration;
(12) manual reset button (reset FPGA, FPGA reset ARM, ARM reset SRF_AD9361_V2.0 module, ARM ARM SRF_AD9361_V2.0 module configuration is completed, notify FPGA).
(10) the optional USB 3 high speed channel;